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Diffstat (limited to 'libhw/rp2040_hwspi.c')
| -rw-r--r-- | libhw/rp2040_hwspi.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/libhw/rp2040_hwspi.c b/libhw/rp2040_hwspi.c index da7ee78..47dfc97 100644 --- a/libhw/rp2040_hwspi.c +++ b/libhw/rp2040_hwspi.c @@ -40,14 +40,6 @@ void _rp2040_hwspi_init(struct rp2040_hwspi *self, assert(pin_mosi != pin_cs); assert(pin_clk != pin_cs); - /* I know we called this "hwspi", but we're actually going to - * disconnect the CS pin from the PL022 SSP and manually drive - * it from software. This is because the PL022 has a maximum - * of 16-bit frames, while we need to be able to do *at least* - * 32-bit frames (and ideally, much larger). By managing it - * ourselves, we can just keep CS pulled low extra-long, - * making the frame extra-long. */ - /* Regarding the constraints on pin assignments: see the * RP2040 datasheet, table 2, in ยง1.4.3 "GPIO Functions". */ switch (inst_num) { |