diff options
| -rw-r--r-- | cmd/sbc_harness/CMakeLists.txt | 10 | ||||
| -rw-r--r-- | cmd/sbc_harness/main.c | 2 | ||||
| -rw-r--r-- | libhw/rp2040_include/libhw/rp2040_hwspi.h | 4 |
3 files changed, 15 insertions, 1 deletions
diff --git a/cmd/sbc_harness/CMakeLists.txt b/cmd/sbc_harness/CMakeLists.txt index 081a5fc..d7923c2 100644 --- a/cmd/sbc_harness/CMakeLists.txt +++ b/cmd/sbc_harness/CMakeLists.txt @@ -31,6 +31,16 @@ target_link_libraries(sbc_harness_objs pico_minimize_runtime(sbc_harness_objs INCLUDE PRINTF PRINTF_MINIMAL PRINTF_LONG_LONG PRINTF_PTRDIFF_T ) +target_compile_definitions(sbc_harness_objs PRIVATE + #PICO_USE_FASTEST_SUPPORTED_CLOCK=1 + + # Calculated by `./3rd-party/pico-sdk/src/rp2_common/hardware_clocks/scripts/vcocalc.py --cmake-only 170` + PLL_SYS_REFDIV=2 + PLL_SYS_VCO_FREQ_HZ=1530000000 + PLL_SYS_POSTDIV1=3 + PLL_SYS_POSTDIV2=3 + SYS_CLK_HZ=170000000 +) suppress_tinyusb_warnings() diff --git a/cmd/sbc_harness/main.c b/cmd/sbc_harness/main.c index 8e2c5ee..c932ec0 100644 --- a/cmd/sbc_harness/main.c +++ b/cmd/sbc_harness/main.c @@ -168,7 +168,7 @@ COROUTINE init_cr(void *) { rp2040_hwspi_init(&globals.dev_spi, "W5500", RP2040_HWSPI_0, SPI_MODE_0, /* the W5500 supports mode 0 or mode 3 */ - 31250000, /* min(w5500, hwspi); w5500=80MHz; hwspi=31.25MHz, see rp2040_hwspi.h for a comment about why this is so low */ + 42500000, /* min(w5500, hwspi); w5500=80MHz; hwspi=42.5MHz, see rp2040_hwspi.h for a comment about why this is so low */ 30, /* W5500 datasheet says min(T_CS = SCSn High Time) = 30ns */ 0, /* bogus write write data when doing a read */ 16, /* PIN_MISO */ diff --git a/libhw/rp2040_include/libhw/rp2040_hwspi.h b/libhw/rp2040_include/libhw/rp2040_hwspi.h index f90c1af..a76a2c8 100644 --- a/libhw/rp2040_include/libhw/rp2040_hwspi.h +++ b/libhw/rp2040_include/libhw/rp2040_hwspi.h @@ -73,6 +73,10 @@ LO_IMPLEMENTATION_H(spi, struct rp2040_hwspi, rp2040_hwspi) * that the CPU can't do things in time. * + Experimentally: * | clk_sys=125MHz | baud=31.25MHz | works OK | + * | clk_sys=160MHz | baud=40 MHz | works OK | + * | clk_sys=170MHz | baud=42.5 MHz | works OK | + * | clk_sys=180MHz | baud=45 MHz | mangled in funny ways? | + * | clk_sys=200MHz | baud=50 MHz | messages get shifted right a bit | * | clk_sys=125MHz | baud=62.5 MHz | messages get shifted right a bit | * * Both of these restrictions aught to be avoidable by using a |