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author | Luke T. Shumaker <lukeshu@lukeshu.com> | 2025-03-03 00:42:47 -0700 |
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committer | Luke T. Shumaker <lukeshu@lukeshu.com> | 2025-03-03 23:33:45 -0700 |
commit | ab32648720ea3c256b79b867fa2992b4601b4214 (patch) | |
tree | 4b8928afbe345daf963ed144fabf2d66cc188e59 /gdb-helpers | |
parent | 55df5f277fe53b964361fb5e305ca574082afd91 (diff) |
gdb-helpers: rp2040-show-interrupts: Fuss with output
Diffstat (limited to 'gdb-helpers')
-rw-r--r-- | gdb-helpers/rp2040.py | 54 |
1 files changed, 36 insertions, 18 deletions
diff --git a/gdb-helpers/rp2040.py b/gdb-helpers/rp2040.py index ec719e8..9e10d73 100644 --- a/gdb-helpers/rp2040.py +++ b/gdb-helpers/rp2040.py @@ -18,6 +18,23 @@ def fmt32(x: int) -> str: return "0b" + bin(x)[2:].rjust(32, "0") +def box(title: str, content: str) -> str: + width = 80 + + lines = content.split("\n") + while len(lines) and lines[0] == "": + lines = lines[1:] + while len(lines) and lines[-1] == "": + lines = lines[:-1] + lines = ["", *lines, ""] + + ret = "┏━[" + title + "]" + ("━" * (width - len(title) - 5)) + "┓\n" + for line in content.split("\n"): + ret += f"┃ {line.ljust(width-4)} ┃\n" + ret += "┗" + ("━" * (width - 2)) + "┛" + return ret + + def read_prio(addr: int) -> str: prios: list[int] = 32 * [0] for regnum in range(0, 8): @@ -96,20 +113,19 @@ class RP2040ShowInterrupts(gdb.Command): ) def invoke(self, arg: str, from_tty: bool) -> None: - self.arm_cortex_m0plus_mmregisters() self.arm_cortex_m0plus_registers() - print() + self.arm_cortex_m0plus_mmregisters() def arm_cortex_m0plus_mmregisters(self) -> None: base: int = 0xE0000000 icsr = read_mmreg(base + 0xED04) print( - f""" -ARM Cortex-M0+ memory-mapped registers: - + box( + "ARM Cortex-M0+ memory-mapped registers", + f""" clocks╖ ┌SIO SPI┐ ║ │╓QSPI - UART┐│ ║ │║╓bank0 ╓XIP + UART┐│ ║ │║╓GPIO ╓XIP ADC╖ ││ ║ │║║┌DMA ║╓USB I2C┐ ║ ││ ║ │║║│ ┌PIO║║╓PWM RTC╖├┐║┌┤├┐║┌┤║║├┐├──┐║║║┌──┬timers @@ -140,27 +156,29 @@ AIRCR : {fmt32(read_mmreg(base+0xed0c)) } Application Interrupt and Reset Co ╓sleep_deep s_ev_on_pend╖ ║╓sleep_on_exit SCR : {fmt32(read_mmreg(base+0xed10)) } System Control -""" +""", + ) ) def arm_cortex_m0plus_registers(self) -> None: psr = read_reg("xPSR") print( - f""" -ARM Cortex-M0+ processor core registers: - + box( + "ARM Cortex-M0+ processor-core registers", + f""" ╓pm (0=normal, 1=top priority) PRIMASK : {fmt32(read_reg('primask')) } Priority Mask - [C]arry╖╓o[V]erflow - [Z]ero╖║║ ╓[T]humb ╓require [a]lignment - [N]egative╖║║║ ║ exec ║ ┌interrupt - app╫╫╫╢ ╟───────┴──────╢┌────┴──┐ + app exec intr + ┌┴─┐ ┌───────┴──────┐┌───┴───┐ xPSR : {fmt32(psr) } {{Application,Execution,Interrupt}} Program Status - └────┬──┘ - └{psr&0x1FF} ({exception_names[psr&0x1FF]}) - -""" + ║║║║ ║ ║└───┬───┘ + [N]egative╜║║║ ║ ║ └{psr&0x1FF} ({exception_names[psr&0x1FF]}) + [Z]ero╜║║ ╙[T]humb ╙require [a]lignment + [C]arry╜║ + o[V]erflow╜ +""", + ) ) |