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authorLuke T. Shumaker <lukeshu@lukeshu.com>2024-10-21 15:15:22 -0600
committerLuke T. Shumaker <lukeshu@lukeshu.com>2024-10-21 19:01:05 -0600
commita27d33b74d77ccb3d9dd9d68f4a9e2d5deed54e0 (patch)
tree67f95b050aaa6021bfd4e0584d2471bcadeb3b6e /cmd/sbc_harness/hw/w5500_ll.h
parent1ad43f867bda5a9c0061295989f6c38b5226b512 (diff)
Factor out libmisc/endian.h
Diffstat (limited to 'cmd/sbc_harness/hw/w5500_ll.h')
-rw-r--r--cmd/sbc_harness/hw/w5500_ll.h53
1 files changed, 19 insertions, 34 deletions
diff --git a/cmd/sbc_harness/hw/w5500_ll.h b/cmd/sbc_harness/hw/w5500_ll.h
index b0a023a..7c57ce8 100644
--- a/cmd/sbc_harness/hw/w5500_ll.h
+++ b/cmd/sbc_harness/hw/w5500_ll.h
@@ -14,26 +14,11 @@
#include <stdint.h> /* for uint{n}_t */
#include <string.h> /* for memcmp() */
-#include <libmisc/net.h> /* for struct net_eth_addr, struct net_ip4_addr */
-#include <libmisc/vcall.h> /* for VCALL() */
-#include "hw/spi.h" /* for implements_spi */
+#include <libmisc/net.h> /* for struct net_eth_addr, struct net_ip4_addr */
+#include <libmisc/vcall.h> /* for VCALL() */
+#include <libmisc/endian.h> /* for uint16be_t */
+#include "hw/spi.h" /* for implements_spi */
-/* uint16 utilities. *********************************************************/
-
-struct uint16_be {
- uint8_t octets[2];
-};
-
-static inline struct uint16_be encode_u16be(uint16_t x) {
- struct uint16_be ret;
- ret.octets[0] = (uint8_t)(x>>8);
- ret.octets[1] = (uint8_t)x;
- return ret;
-}
-
-static inline uint16_t decode_u16be(struct uint16_be x) {
- return ((uint16_t)x.octets[0])<<8 | x.octets[1];
-}
/* Low-level protocol built on SPI frames. ***********************************/
@@ -110,24 +95,24 @@ struct w5500ll_block_common_reg {
struct net_eth_addr eth_addr; /* SHAR0 ... SHAR5 */
struct net_ip4_addr ip_addr; /* SIPR0 ... SIPR3 */
- struct uint16_be intlevel; /* INTLEVEL0, INTLEVEL1; if non-zero,
+ uint16be_t intlevel; /* INTLEVEL0, INTLEVEL1; if non-zero,
* hysteresis between pin_intr being pulled
* low (hysteresis=(intlevel+1)*4/(150MHz)) */
uint8_t chip_interrupt; /* IR; bitfield, see CHIPINTR_{x} below */
uint8_t chip_interrupt_mask; /* IMR; bitfield, see CHIPINTR_{x} below, 0=disable, 1=enable */
uint8_t sock_interrupt; /* SIR; bitfield of which sockets have their .interrupt set */
uint8_t sock_interrupt_mask; /* SIMR; bitfield of sockets, 0=disable, 1=enable */
- struct uint16_be retry_time; /* RTR0, RTR0; configures re-transmission period, in units of 100µs */
+ uint16be_t retry_time; /* RTR0, RTR0; configures re-transmission period, in units of 100µs */
uint8_t retry_count; /* RCR; configures max re-transmission count */
uint8_t ppp_lcp_request_timer; /* PTIMER */
uint8_t ppp_lcp_magic_bumber; /* PMAGIC */
struct net_eth_addr ppp_dst_eth_addr; /* PHAR0 ... PHAR5 */
- struct uint16_be ppp_sess_id; /* PSID0 ... PSID1 */
- struct uint16_be ppp_max_seg_size; /* PMRU0 ... PMRU1 */
+ uint16be_t ppp_sess_id; /* PSID0 ... PSID1 */
+ uint16be_t ppp_max_seg_size; /* PMRU0 ... PMRU1 */
struct net_ip4_addr unreachable_ip_addr; /* UIPR0 ... UIPR3 */
- struct uint16_be unreachable_port; /* UPORTR0, UPORTR1 */
+ uint16be_t unreachable_port; /* UPORTR0, UPORTR1 */
uint8_t phy_cfg; /* PHYCFGR */
@@ -176,12 +161,12 @@ struct w5500ll_block_sock_reg {
uint8_t command; /* Sn_CR; see CMD_{x} below */
uint8_t interrupt; /* Sn_IR; bitfield, see SOCKINTR_{x} below */
uint8_t state; /* Sn_SR; see STATE_{x} below */
- struct uint16_be local_port; /* Sn_PORT0, Sn_PORT1 */
+ uint16be_t local_port; /* Sn_PORT0, Sn_PORT1 */
struct net_eth_addr remote_eth_addr; /* Sn_DHAR0 ... SnDHAR5 */
struct net_ip4_addr remote_ip_addr; /* Sn_DIPR0 ... Sn_DIP3 */
- struct uint16_be remote_port; /* Sn_DPORT0 ... Sn_DPORT1 */
+ uint16be_t remote_port; /* Sn_DPORT0 ... Sn_DPORT1 */
- struct uint16_be max_seg_size; /* Sn_MSSR0, Sn_MSSR1 */
+ uint16be_t max_seg_size; /* Sn_MSSR0, Sn_MSSR1 */
uint8_t _reserved0[1];
uint8_t ip_tos; /* Sn_TOS */
uint8_t ip_ttl; /* Sn_TTL */
@@ -189,15 +174,15 @@ struct w5500ll_block_sock_reg {
uint8_t rx_buf_size; /* Sn_RXBUF_SIZE; in KiB, power of 2, <= 16 */
uint8_t tx_buf_size; /* Sn_TXBUF_SIZE; in KiB, power of 2, <= 16 */
- struct uint16_be tx_free_size; /* Sn_TX_FSR0, Sn_TX_FSR1 */
- struct uint16_be tx_read_pointer; /* Sn_TX_RD0, Sn_TX_RD1 */
- struct uint16_be tx_write_pointer; /* Sn_TX_WR0, Sn_TX_WR1 */
- struct uint16_be rx_size; /* Sn_RX_RSR0, Sn_RX_RSR1 */
- struct uint16_be rx_read_pointer; /* Sn_RX_RD0, Sn_RX_RD1 */
- struct uint16_be rx_write_pointer; /* Sn_RX_WR0, Sn_RX_WR1 */
+ uint16be_t tx_free_size; /* Sn_TX_FSR0, Sn_TX_FSR1 */
+ uint16be_t tx_read_pointer; /* Sn_TX_RD0, Sn_TX_RD1 */
+ uint16be_t tx_write_pointer; /* Sn_TX_WR0, Sn_TX_WR1 */
+ uint16be_t rx_size; /* Sn_RX_RSR0, Sn_RX_RSR1 */
+ uint16be_t rx_read_pointer; /* Sn_RX_RD0, Sn_RX_RD1 */
+ uint16be_t rx_write_pointer; /* Sn_RX_WR0, Sn_RX_WR1 */
uint8_t interrupt_mask; /* Sn_IMR */
- struct uint16_be fragment_offset; /* Sn_FRAG0, Sn_FRAG1 */
+ uint16be_t fragment_offset; /* Sn_FRAG0, Sn_FRAG1 */
uint8_t keepalive_timer; /* Sn_KPALVTR */
};
static_assert(sizeof(struct w5500ll_block_sock_reg) == 0x30);