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/* hw/rp2040_hwspi.h - `implements_spi` implementation for the RP2040's
* ARM Primecell SSP (PL022) (header file)
*
* Copyright (C) 2024 Luke T. Shumaker <lukeshu@lukeshu.com>
* SPDX-Licence-Identifier: AGPL-3.0-or-later
*/
#ifndef _RP2040_HWSPI_H_
#define _RP2040_HWSPI_H_
#include <pico/binary_info.h> /* for bi_* */
#include "hw/spi.h"
enum rp2040_hwspi_instance {
RP2040_HWSPI_0 = 0,
RP2040_HWSPI_1 = 1,
};
struct rp2040_hwspi {
implements_spi;
void /*spi_inst_t*/ *inst;
uint pin_cs;
};
/**
* Initialize an instance of `struct rp2040_hwspi`.
*
* @param self : struct rp2040_hwspi : the structure to initialize
* @param name : char * : a name for the SPI port; to include in the bininfo
* @param inst_num : enum rp2040_hwspi_instance : the PL220 instance number; RP2040_HWSPI_{0,1}
* @param mode : enum spi_mode : the SPI mode; SPI_MODE_{0..3}
* @param pin_miso : uint : pin number; 0, 4, 16, or 20 for _HWSPI_0; 8, 12, 24, or 28 for _HWSPI_1
* @param pin_mosi : uint : pin number; 3, 7, 19, or 23 for _HWSPI_0; 11, 15, or 27 for _HWSPI_1
* @param pin_clk : uint : pin number; 2, 6, 18, or 22 for _HWSPI_0; 10, 14, or 26 for _HWSPI_1
* @param pin_cs : uint : pin number; any unused GPIO pin
*
* There is no bit-order argument; the RP2040's hardware SPI always
* uses MSB-first bit order.
*/
#define rp2040_hwspi_init(self, name, \
inst_num, mode, baudrate_hz, \
pin_miso, pin_mosi, pin_clk, pin_cs) \
do { \
bi_decl(bi_4pins_with_names(pin_miso, name" SPI MISO", \
pin_mosi, name" SPI MOSI", \
pin_mosi, name" SPI CLK", \
pin_mosi, name" SPI CS")); \
_rp2040_hwspi_init(self, \
inst_num, mode, baudrate_hz, \
pin_miso, pin_mosi, pin_clk, pin_cs); \
} while(0)
void _rp2040_hwspi_init(struct rp2040_hwspi *self,
enum rp2040_hwspi_instance inst_num,
enum spi_mode mode,
uint baudrate_hz,
uint pin_miso,
uint pin_mosi,
uint pin_clk,
uint pin_cs);
#endif /* _RP2040_HWSPI_H_ */
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