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authorLuke T. Shumaker <lukeshu@lukeshu.com>2025-04-22 18:51:59 -0600
committerLuke T. Shumaker <lukeshu@lukeshu.com>2025-05-06 11:53:17 -0600
commit24e5d0ec1219e2dbb4b9510ef20833092a2b3871 (patch)
tree01bbcc34c6190fa1c35b2625e9ba1744b1447606 /libhw_cr/rp2040_dma.h
parentf09b7435b3a5222597d27238226d23ec0cbd5bd2 (diff)
wip: Build with -Wconversionlukeshu/safe-conversion
I think this found a real bug in the dhcp packet parser. I don't think anything called lib9p_str{,n}() values that could be big enough, but their bounds-checking was broken.
Diffstat (limited to 'libhw_cr/rp2040_dma.h')
-rw-r--r--libhw_cr/rp2040_dma.h29
1 files changed, 15 insertions, 14 deletions
diff --git a/libhw_cr/rp2040_dma.h b/libhw_cr/rp2040_dma.h
index c7f5a8f..a6f4ae3 100644
--- a/libhw_cr/rp2040_dma.h
+++ b/libhw_cr/rp2040_dma.h
@@ -17,6 +17,7 @@
#include <hardware/regs/dreq.h> /* for DREQ_* for use with DMA_CTRL_TREQ_SEL() */
#include <hardware/structs/dma.h> /* for dma_hw, dma_channel_hw_t, DMA_NUM_CHANNELS */
+#include <libmisc/assert.h>
#include <libmisc/macro.h> /* for LM_FLOORLOG2() */
/* Borrowed from <hardware/dma.h> *********************************************/
@@ -52,20 +53,20 @@ typedef void (*dmairq_handler_t)(void *arg, enum dmairq irq, uint channel);
*/
void dmairq_set_and_enable_exclusive_handler(enum dmairq irq, uint channel, dmairq_handler_t fn, void *arg);
-#define DMA_CTRL_ENABLE (1<<0)
-#define DMA_CTRL_HI_PRIO (1<<1)
-#define DMA_CTRL_DATA_SIZE(sz) ((sz)<<2)
-#define DMA_CTRL_INCR_READ (1<<4)
-#define DMA_CTRL_INCR_WRITE (1<<5)
-#define _DMA_CTRL_RING_BITS(b) ((b)<<6)
-#define _DMA_CTRL_RING_RD (0)
-#define _DMA_CTRL_RING_WR (1<<10)
-#define DMA_CTRL_RING(rdwr, bits) (_DMA_CTRL_RING_##rdwr | _DMA_CTRL_RING_BITS(bits))
-#define DMA_CTRL_CHAIN_TO(ch) ((ch)<<11)
-#define DMA_CTRL_TREQ_SEL(dreq) ((dreq)<<15)
-#define DMA_CTRL_IRQ_QUIET (1<<21)
-#define DMA_CTRL_BSWAP (1<<22)
-#define DMA_CTRL_SNIFF_EN (1<<23)
+#define DMA_CTRL_ENABLE (((uint32_t)1)<<0)
+#define DMA_CTRL_HI_PRIO (((uint32_t)1)<<1)
+#define DMA_CTRL_DATA_SIZE(sz) (((uint32_t)(sz))<<(2 + static_assert_as_expr((sz) <= 0b11)))
+#define DMA_CTRL_INCR_READ (((uint32_t)1)<<4)
+#define DMA_CTRL_INCR_WRITE (((uint32_t)1)<<5)
+#define _DMA_CTRL_RING_BITS(bitcnt) (((uint32_t)(bitcnt))<<(6 + static_assert_as_expr((bitcnt) <= 0b1111)))
+#define _DMA_CTRL_RING_RD ((uint32_t)0)
+#define _DMA_CTRL_RING_WR (((uint32_t)1)<<10)
+#define DMA_CTRL_RING(rdwr, bitcnt) (_DMA_CTRL_RING_##rdwr | _DMA_CTRL_RING_BITS(bitcnt))
+#define DMA_CTRL_CHAIN_TO(ch) (((uint32_t)(ch))<<11)
+#define DMA_CTRL_TREQ_SEL(dreq) (((uint32_t)(dreq))<<(15 + static_assert_as_expr((dreq) <= 0b111111)))
+#define DMA_CTRL_IRQ_QUIET (((uint32_t)1)<<21)
+#define DMA_CTRL_BSWAP (((uint32_t)1)<<22)
+#define DMA_CTRL_SNIFF_EN (((uint32_t)1)<<23)
/* | elem | val | name */
#define READ_ADDR /*|*/volatile const void/*|*/ * /*|*/read_addr